The following tutorial, by Stuart Sutherland of Sutherland HDL, is an updated version of a paper presented at HDLCon in March 2000. It provides an overview of the changes in the Verilog-2001 standard.

While there has been no shortage of FPGA-based recreations of classic processors, we always enjoy seeing a new approach. Last month [Some Assembly Required] took on the challenge to recreate a classic ...